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᡼(ǻ)ȽϩƱå׾˽Ѥ ǤȤĶϤΤ VisionChip?ȸƤӤޤ

®屿ưVisionChip?

θǤϡʹ֤δι®屿ư(å)򸡽Ф뤿 VisionChip?μ¸ܻؤޤ ®屿ư(å)Ϥդ̵ռǤäƤޤ ʹ֤ΰռտޤȿطƤ뤳ȤΤƤޤ Ĥޤꤳ򸡽ФǤСʹ֤ȵδؤꤢ (ޥ-ޥ󥤥󥿥ե)Ȥʤǽ櫓Ǥ ®屿ư(å)˹®Ǥ뤿ᡢ ư®٤ޤǸФ뤳ȤϡޤǤβϤǤԲǽǤ VisionChip?Ǽ¸褦Ȥ櫓Ǥ

Ƕϡϩ󤴤Ȥ֤פˤäơ ٤˸(640480)ܽƤޤ

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ǿȯɽʸ򤴻Ȥ

  • J.Akita, H.Takagi, T.Nagasaki. M.Toda, T.Kawashima, A.Kitagawa, Vision Chip Architecture for Saccade Tracking, Proceedings of 2005 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, P23, pp.133-136, 2005.6.
  • ڹϡĽ, ®屿ưбλеǽVisionChip?ƥ, ǥز񵻽, Vol.29, Vo.34, IST2005-30, pp.17-20, 2005.6.
  • ڹϡĽ, ®屿ưбλеǽVision Chipλɾ, ǥز񵻽, Vol.30, No.32, pp.17--20, 2006.6.
  • J.Akita, H.Takagi, T.Nagasaki, M.Toda, T.Kawashima, A.Kitagawa, Vision Chip Architecture for Detecting Line of Sight Including Saccade, IEICE Transactions on Electronics, Vol.E89-C, No.11, pp.1605-1611, 2006.11.
  • Ľ졦ڹϡƲʹĿ֡Ḽ́, ®屿ưбλеǽVision Chipƥ, ǥز񵻽, Vol.31, No.3, pp.9-12, 2007.1.
  • ƲʹסĽ, ®屿ưбλеǽVision Chip߷, ǥز񵻽, Vol.31, No.28, pp.13-16, 2007.6.
  • J.Akita, H.Takagi, K.Doumae, A.Kitagawa, M.Toda, T.Nagasaki, T.Kawashima, Column-Parallel Vision Chip Architecture for High-Resolution Line-of-Sight Detection Including Saccade, IEICE Trans. on Electronics, Vol.E90-C, No.10, pp.1869-1875, 2007.10.
  • ƲʹĽ, ®屿ưбλеǽVision Chipλ, ǥز񵻽, IST2008-20, pp.5-8, 2008.6.
  • ƲʹĽ, ®FPGAѤVision Chipߥ졼, ˡǥز񵻽, Vol.32, No.57, pp.33-36, 2008.12.
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